//
// Register Declarations for Microchip 16F721 Processor
//
//
// This header file was automatically generated by:
//
//      inc2h.pl
//
//      Copyright (c) 2002, Kevin L. Pauba, All Rights Reserved
//
//      SDCC is licensed under the GNU Public license (GPL) v2.  Note that
//      this license covers the code to the compiler and other executables,
//      but explicitly does not cover any code or objects generated by sdcc.
//
//      For pic device libraries and header files which are derived from
//      Microchip header (.inc) and linker script (.lkr) files Microchip
//      requires that "The header files should state that they are only to be
//      used with authentic Microchip devices" which makes them incompatible
//      with the GPL. Pic device libraries and header files are located at
//      non-free/lib and non-free/include directories respectively.
//      Sdcc should be run with the --use-non-free command line option in
//      order to include non-free header files and libraries.
//
//      See http://sdcc.sourceforge.net/ for the latest information on sdcc.
//
//
#ifndef P16F721_H
#define P16F721_H

//
// Register addresses.
//
#define INDF_ADDR       0x0000
#define TMR0_ADDR       0x0001
#define PCL_ADDR        0x0002
#define STATUS_ADDR     0x0003
#define FSR_ADDR        0x0004
#define PORTA_ADDR      0x0005
#define PORTB_ADDR      0x0006
#define PORTC_ADDR      0x0007
#define PCLATH_ADDR     0x000A
#define INTCON_ADDR     0x000B
#define PIR1_ADDR       0x000C
#define TMR1_ADDR       0x000E
#define TMR1L_ADDR      0x000E
#define TMR1H_ADDR      0x000F
#define T1CON_ADDR      0x0010
#define TMR2_ADDR       0x0011
#define T2CON_ADDR      0x0012
#define SSPBUF_ADDR     0x0013
#define SSPCON_ADDR     0x0014
#define CCPR1_ADDR      0x0015
#define CCPR1L_ADDR     0x0015
#define CCPR1H_ADDR     0x0016
#define CCP1CON_ADDR    0x0017
#define RCSTA_ADDR      0x0018
#define TXREG_ADDR      0x0019
#define RCREG_ADDR      0x001A
#define ADRES_ADDR      0x001E
#define ADCON0_ADDR     0x001F
#define OPTION_REG_ADDR 0x0081
#define TRISA_ADDR      0x0085
#define TRISB_ADDR      0x0086
#define TRISC_ADDR      0x0087
#define PIE1_ADDR       0x008C
#define PCON_ADDR       0x008E
#define T1GCON_ADDR     0x008F
#define OSCCON_ADDR     0x0090
#define OSCTUNE_ADDR    0x0091
#define PR2_ADDR        0x0092
#define SSPADD_ADDR     0x0093
#define SSPMSK_ADDR     0x0093
#define SSPSTAT_ADDR    0x0094
#define WPUA_ADDR       0x0095
#define IOCA_ADDR       0x0096
#define TXSTA_ADDR      0x0098
#define SPBRG_ADDR      0x0099
#define FVRCON_ADDR     0x009D
#define ADCON1_ADDR     0x009F
#define PMDATL_ADDR     0x010C
#define PMADRL_ADDR     0x010D
#define PMDATH_ADDR     0x010E
#define PMADRH_ADDR     0x010F
#define WPUB_ADDR       0x0115
#define IOCB_ADDR       0x0116
#define ANSELA_ADDR     0x0185
#define ANSELB_ADDR     0x0186
#define ANSELC_ADDR     0x0187
#define PMCON1_ADDR     0x018C
#define PMCON2_ADDR     0x018D

//
// Memory organization.
//



//         LIST

//==========================================================================
//  MPASM PIC16F721 processor include
//
//  (c) Copyright 1999-2011 Microchip Technology, All rights reserved
//==========================================================================

//         NOLIST

//==========================================================================
//  This header file defines configurations, registers, and other useful
//  bits of information for the PIC16F721 microcontroller.  These names
//  are taken to match the data sheets as closely as possible.
//
//  Note that the processor must be selected before this file is included.
//  The processor may be selected the following ways:
//
//       1. Command line switch:
//               C:\MPASM MYFILE.ASM /PIC16F721
//       2. LIST directive in the source file
//               LIST   P=PIC16F721
//       3. Processor Type entry in the MPASM full-screen interface
//       4. Setting the processor in the MPLAB Project Dialog
//==========================================================================

//==========================================================================
//
//       Verify Processor
//
//==========================================================================
//        IFNDEF __16F721
//            MESSG "Processor-header file mismatch.  Verify selected processor."
//         ENDIF



//==========================================================================
//
//       Register Definitions
//
//==========================================================================

#define W                    0x0000
#define F                    0x0001

//----- Register Files -----------------------------------------------------

//-----Bank0------------------
extern __sfr  __at (INDF_ADDR)                    INDF;
extern __sfr  __at (TMR0_ADDR)                    TMR0;
extern __sfr  __at (PCL_ADDR)                     PCL;
extern __sfr  __at (STATUS_ADDR)                  STATUS;
extern __sfr  __at (FSR_ADDR)                     FSR;
extern __sfr  __at (PORTA_ADDR)                   PORTA;
extern __sfr  __at (PORTB_ADDR)                   PORTB;
extern __sfr  __at (PORTC_ADDR)                   PORTC;
extern __sfr  __at (PCLATH_ADDR)                  PCLATH;
extern __sfr  __at (INTCON_ADDR)                  INTCON;
extern __sfr  __at (PIR1_ADDR)                    PIR1;
extern __sfr  __at (TMR1_ADDR)                    TMR1;
extern __sfr  __at (TMR1L_ADDR)                   TMR1L;
extern __sfr  __at (TMR1H_ADDR)                   TMR1H;
extern __sfr  __at (T1CON_ADDR)                   T1CON;
extern __sfr  __at (TMR2_ADDR)                    TMR2;
extern __sfr  __at (T2CON_ADDR)                   T2CON;
extern __sfr  __at (SSPBUF_ADDR)                  SSPBUF;
extern __sfr  __at (SSPCON_ADDR)                  SSPCON;
extern __sfr  __at (CCPR1_ADDR)                   CCPR1;
extern __sfr  __at (CCPR1L_ADDR)                  CCPR1L;
extern __sfr  __at (CCPR1H_ADDR)                  CCPR1H;
extern __sfr  __at (CCP1CON_ADDR)                 CCP1CON;
extern __sfr  __at (RCSTA_ADDR)                   RCSTA;
extern __sfr  __at (TXREG_ADDR)                   TXREG;
extern __sfr  __at (RCREG_ADDR)                   RCREG;
extern __sfr  __at (ADRES_ADDR)                   ADRES;
extern __sfr  __at (ADCON0_ADDR)                  ADCON0;

//-----Bank1------------------
extern __sfr  __at (OPTION_REG_ADDR)              OPTION_REG;
extern __sfr  __at (TRISA_ADDR)                   TRISA;
extern __sfr  __at (TRISB_ADDR)                   TRISB;
extern __sfr  __at (TRISC_ADDR)                   TRISC;
extern __sfr  __at (PIE1_ADDR)                    PIE1;
extern __sfr  __at (PCON_ADDR)                    PCON;
extern __sfr  __at (T1GCON_ADDR)                  T1GCON;
extern __sfr  __at (OSCCON_ADDR)                  OSCCON;
extern __sfr  __at (OSCTUNE_ADDR)                 OSCTUNE;
extern __sfr  __at (PR2_ADDR)                     PR2;
extern __sfr  __at (SSPADD_ADDR)                  SSPADD;
extern __sfr  __at (SSPMSK_ADDR)                  SSPMSK;
extern __sfr  __at (SSPSTAT_ADDR)                 SSPSTAT;
extern __sfr  __at (WPUA_ADDR)                    WPUA;
extern __sfr  __at (IOCA_ADDR)                    IOCA;
extern __sfr  __at (TXSTA_ADDR)                   TXSTA;
extern __sfr  __at (SPBRG_ADDR)                   SPBRG;
extern __sfr  __at (FVRCON_ADDR)                  FVRCON;
extern __sfr  __at (ADCON1_ADDR)                  ADCON1;

//-----Bank2------------------
extern __sfr  __at (PMDATL_ADDR)                  PMDATL;
extern __sfr  __at (PMADRL_ADDR)                  PMADRL;
extern __sfr  __at (PMDATH_ADDR)                  PMDATH;
extern __sfr  __at (PMADRH_ADDR)                  PMADRH;
extern __sfr  __at (WPUB_ADDR)                    WPUB;
extern __sfr  __at (IOCB_ADDR)                    IOCB;

//-----Bank3------------------
extern __sfr  __at (ANSELA_ADDR)                  ANSELA;
extern __sfr  __at (ANSELB_ADDR)                  ANSELB;
extern __sfr  __at (ANSELC_ADDR)                  ANSELC;
extern __sfr  __at (PMCON1_ADDR)                  PMCON1;
extern __sfr  __at (PMCON2_ADDR)                  PMCON2;

//----- STATUS Bits -----------------------------------------------------



//----- PORTA Bits -----------------------------------------------------


//----- PORTB Bits -----------------------------------------------------


//----- PORTC Bits -----------------------------------------------------


//----- INTCON Bits -----------------------------------------------------


//----- PIR1 Bits -----------------------------------------------------


//----- T1CON Bits -----------------------------------------------------



//----- T2CON Bits -----------------------------------------------------



//----- SSPCON Bits -----------------------------------------------------



//----- CCP1CON Bits -----------------------------------------------------



//----- RCSTA Bits -----------------------------------------------------


//----- ADCON0 Bits -----------------------------------------------------



//----- OPTION_REG Bits -----------------------------------------------------



//----- TRISA Bits -----------------------------------------------------


//----- TRISB Bits -----------------------------------------------------


//----- TRISC Bits -----------------------------------------------------


//----- PIE1 Bits -----------------------------------------------------


//----- PCON Bits -----------------------------------------------------


//----- T1GCON Bits -----------------------------------------------------



//----- OSCCON Bits -----------------------------------------------------



//----- OSCTUNE Bits -----------------------------------------------------


//----- SSPMSK Bits -----------------------------------------------------


//----- SSPSTAT Bits -----------------------------------------------------


//----- WPUA Bits -----------------------------------------------------


//----- IOCA Bits -----------------------------------------------------


//----- TXSTA Bits -----------------------------------------------------


//----- FVRCON Bits -----------------------------------------------------


//----- ADCON1 Bits -----------------------------------------------------


//----- WPUB Bits -----------------------------------------------------


//----- IOCB Bits -----------------------------------------------------


//----- ANSELA Bits -----------------------------------------------------


//----- ANSELB Bits -----------------------------------------------------


//----- ANSELC Bits -----------------------------------------------------


//----- PMCON1 Bits -----------------------------------------------------



//==========================================================================
//
//       RAM Definitions
//
//==========================================================================
//        __MAXRAM  H'01FF'
//        __BADRAM  H'0008'-H'0009'
//        __BADRAM  H'000D'
//        __BADRAM  H'001B'-H'001D'
//        __BADRAM  H'0088'-H'0089'
//        __BADRAM  H'008D'
//        __BADRAM  H'0097'
//        __BADRAM  H'009A'-H'009C'
//        __BADRAM  H'009E'
//        __BADRAM  H'0105'-H'0109'
//        __BADRAM  H'0110'-H'0114'
//        __BADRAM  H'0117'-H'011F'
//        __BADRAM  H'0188'-H'0189'
//        __BADRAM  H'018E'-H'019F'
//        __BADRAM  H'01A0'-H'01EF'

//==========================================================================
//
//       Configuration Bits
//
//   NAME            Address
//   CONFIG1           2007h
//   CONFIG2           2008h
//
//==========================================================================

// The following is an assignment of address values for all of the
// configuration registers for the purpose of table reads
#define _CONFIG1             0x2007
#define _CONFIG2             0x2008

//----- CONFIG1 Options --------------------------------------------------
#define _FOSC_INTOSCIO       0x3FFC    // INTOSCIO oscillator: I/O function on RA4/CLKO pin, I/O function on RA5/CLKI
#define _INTOSC_NOCLKOUT     0x3FFC    // INTOSCIO oscillator: I/O function on RA4/CLKO pin, I/O function on RA5/CLKI
#define _FOSC_INTOSCCLK      0x3FFD    // INTOSC oscillator: CLKO function on RA4/CLKO pin, I/O function on RA5/CLKI
#define _INTOSC_CLKOUT       0x3FFD    // INTOSC oscillator: CLKO function on RA4/CLKO pin, I/O function on RA5/CLKI
#define _FOSC_ECIO           0x3FFE    // EC oscillator: I/O function on RA4/CLKO pin, CLKI on RA5/CLKI
#define _EC_OSC_NOCLKOUT     0x3FFE    // EC oscillator: I/O function on RA4/CLKO pin, CLKI on RA5/CLKI
#define _FOSC_ECCLK          0x3FFF    // EC oscillator: CLKO function on RA4/CLKO pin, CLKI on RA5/CLKI
#define _EC_OSC_CLKOUT       0x3FFF    // EC oscillator: CLKO function on RA4/CLKO pin, CLKI on RA5/CLKI

#define _WDTE_OFF            0x3FF7    // WDT disabled
#define _WDTEN_OFF           0x3FF7    // WDT disabled
#define _WDTE_ON             0x3FFF    // WDT enabled
#define _WDTEN_ON            0x3FFF    // WDT enabled

#define _PWRTE_ON            0x3FEF    // PWRT enabled
#define _PWRTE_OFF           0x3FFF    // PWRT disabled

#define _MCLRE_OFF           0x3FDF    // RA3/MCLR/VPP pin function is digital input; MCLR internally disabled; Weak pull-up disabled
#define _MCLRE_ON            0x3FFF    // RA3/MCLR/VPP pin function is MCLR; Weak pull-up enabled.

#define _CP_ON               0x3FBF    // 0000h to 0FFFh code protection on
#define _CP_OFF              0x3FFF    // Code protection off

#define _BOREN_OFF           0x3CFF    // Brown-out Reset disabled (Preconditioned State)
#define _BOREN_NSLEEP        0x3EFF    // Brown-out Reset enabled during operation and disabled in Sleep
#define _BOREN_ON            0x3FFF    // Brown-out Reset enabled

#define _PLLEN_OFF           0x2FFF    // INTOSC Frequency is 500 kHz
#define _PLLEN_ON            0x3FFF    // INTOSC Frequency is 16 MHz (32x)

//----- CONFIG2 Options --------------------------------------------------
#define _WRTEN_FULL          0x3FFC    // 0h to FFFh of flash memory write protected, no address may be modified
#define _WRTEN_HALF          0x3FFD    // 0h to 7FFh of flash memory write protected, 800h to FFFh may be modified
#define _WRTEN_BOOT          0x3FFE    // 0h to 1FFh of flash memory write protected, 200h to FFFh may be modified
#define _WRTEN_OFF           0x3FFF    // Write protection off

//----- DEVID Equates --------------------------------------------------
#define _DEVID1              0x2006

//----- IDLOC Equates --------------------------------------------------
#define _IDLOC0              0x2000
#define _IDLOC1              0x2001
#define _IDLOC2              0x2002
#define _IDLOC3              0x2003

//         LIST

// ----- ADCON0 bits --------------------
typedef union {
  struct {
    unsigned char ADON:1;
    unsigned char GO_NOT_DONE:1;
    unsigned char CHS0:1;
    unsigned char CHS1:1;
    unsigned char CHS2:1;
    unsigned char CHS3:1;
    unsigned char :1;
    unsigned char :1;
  };
} __ADCON0bits_t;
extern volatile __ADCON0bits_t __at(ADCON0_ADDR) ADCON0bits;

// ----- ADCON1 bits --------------------
typedef union {
  struct {
    unsigned char :1;
    unsigned char :1;
    unsigned char :1;
    unsigned char :1;
    unsigned char ADCS0:1;
    unsigned char ADCS1:1;
    unsigned char ADCS2:1;
    unsigned char :1;
  };
} __ADCON1bits_t;
extern volatile __ADCON1bits_t __at(ADCON1_ADDR) ADCON1bits;

// ----- ANSELA bits --------------------
typedef union {
  struct {
    unsigned char ANSA0:1;
    unsigned char ANSA1:1;
    unsigned char ANSA2:1;
    unsigned char :1;
    unsigned char ANSA4:1;
    unsigned char ANSA5:1;
    unsigned char :1;
    unsigned char :1;
  };
} __ANSELAbits_t;
extern volatile __ANSELAbits_t __at(ANSELA_ADDR) ANSELAbits;

// ----- ANSELB bits --------------------
typedef union {
  struct {
    unsigned char :1;
    unsigned char :1;
    unsigned char :1;
    unsigned char :1;
    unsigned char ANSB4:1;
    unsigned char ANSB5:1;
    unsigned char :1;
    unsigned char :1;
  };
} __ANSELBbits_t;
extern volatile __ANSELBbits_t __at(ANSELB_ADDR) ANSELBbits;

// ----- ANSELC bits --------------------
typedef union {
  struct {
    unsigned char ANSC0:1;
    unsigned char ANSC1:1;
    unsigned char ANSC2:1;
    unsigned char ANSC3:1;
    unsigned char :1;
    unsigned char :1;
    unsigned char ANSC6:1;
    unsigned char ANSC7:1;
  };
} __ANSELCbits_t;
extern volatile __ANSELCbits_t __at(ANSELC_ADDR) ANSELCbits;

// ----- CCP1CON bits --------------------
typedef union {
  struct {
    unsigned char CCP1M0:1;
    unsigned char CCP1M1:1;
    unsigned char CCP1M2:1;
    unsigned char CCP1M3:1;
    unsigned char B1:1;
    unsigned char DC1:1;
    unsigned char :1;
    unsigned char :1;
  };
  struct {
    unsigned char :1;
    unsigned char :1;
    unsigned char :1;
    unsigned char :1;
    unsigned char CCP1Y:1;
    unsigned char CCP1X:1;
    unsigned char :1;
    unsigned char :1;
  };
} __CCP1CONbits_t;
extern volatile __CCP1CONbits_t __at(CCP1CON_ADDR) CCP1CONbits;

// ----- FVRCON bits --------------------
typedef union {
  struct {
    unsigned char ADFVR0:1;
    unsigned char ADFVR1:1;
    unsigned char :1;
    unsigned char :1;
    unsigned char TSRNG:1;
    unsigned char TSEN:1;
    unsigned char FVREN:1;
    unsigned char FVRRDY:1;
  };
} __FVRCONbits_t;
extern volatile __FVRCONbits_t __at(FVRCON_ADDR) FVRCONbits;

// ----- INTCON bits --------------------
typedef union {
  struct {
    unsigned char RABIF:1;
    unsigned char INTF:1;
    unsigned char TMR0IF:1;
    unsigned char RABIE:1;
    unsigned char INTE:1;
    unsigned char TMR0IE:1;
    unsigned char PEIE:1;
    unsigned char GIE:1;
  };
} __INTCONbits_t;
extern volatile __INTCONbits_t __at(INTCON_ADDR) INTCONbits;

// ----- IOCA bits --------------------
typedef union {
  struct {
    unsigned char IOCA0:1;
    unsigned char IOCA1:1;
    unsigned char IOCA2:1;
    unsigned char IOCA3:1;
    unsigned char IOCA4:1;
    unsigned char IOCA5:1;
    unsigned char :1;
    unsigned char :1;
  };
} __IOCAbits_t;
extern volatile __IOCAbits_t __at(IOCA_ADDR) IOCAbits;

// ----- IOCB bits --------------------
typedef union {
  struct {
    unsigned char :1;
    unsigned char :1;
    unsigned char :1;
    unsigned char :1;
    unsigned char IOCB4:1;
    unsigned char IOCB5:1;
    unsigned char IOCB6:1;
    unsigned char IOCB7:1;
  };
} __IOCBbits_t;
extern volatile __IOCBbits_t __at(IOCB_ADDR) IOCBbits;

// ----- OPTION_REG bits --------------------
typedef union {
  struct {
    unsigned char PS0:1;
    unsigned char PS1:1;
    unsigned char PS2:1;
    unsigned char PSA:1;
    unsigned char T0SE:1;
    unsigned char T0CS:1;
    unsigned char INTEDG:1;
    unsigned char NOT_RABPU:1;
  };
} __OPTION_REGbits_t;
extern volatile __OPTION_REGbits_t __at(OPTION_REG_ADDR) OPTION_REGbits;

// ----- OSCCON bits --------------------
typedef union {
  struct {
    unsigned char :1;
    unsigned char :1;
    unsigned char ICSS:1;
    unsigned char ICSL:1;
    unsigned char IRCF0:1;
    unsigned char IRCF1:1;
    unsigned char :1;
    unsigned char :1;
  };
} __OSCCONbits_t;
extern volatile __OSCCONbits_t __at(OSCCON_ADDR) OSCCONbits;

// ----- OSCTUNE bits --------------------
typedef union {
  struct {
    unsigned char TUN0:1;
    unsigned char TUN1:1;
    unsigned char TUN2:1;
    unsigned char TUN3:1;
    unsigned char TUN4:1;
    unsigned char TUN5:1;
    unsigned char :1;
    unsigned char :1;
  };
} __OSCTUNEbits_t;
extern volatile __OSCTUNEbits_t __at(OSCTUNE_ADDR) OSCTUNEbits;

// ----- PCON bits --------------------
typedef union {
  struct {
    unsigned char NOT_BOR:1;
    unsigned char NOT_POR:1;
    unsigned char :1;
    unsigned char :1;
    unsigned char :1;
    unsigned char :1;
    unsigned char :1;
    unsigned char :1;
  };
} __PCONbits_t;
extern volatile __PCONbits_t __at(PCON_ADDR) PCONbits;

// ----- PIE1 bits --------------------
typedef union {
  struct {
    unsigned char TMR1IE:1;
    unsigned char TMR2IE:1;
    unsigned char CCP1IE:1;
    unsigned char SSPIE:1;
    unsigned char TXIE:1;
    unsigned char RCIE:1;
    unsigned char ADIE:1;
    unsigned char TMR1GIE:1;
  };
} __PIE1bits_t;
extern volatile __PIE1bits_t __at(PIE1_ADDR) PIE1bits;

// ----- PIR1 bits --------------------
typedef union {
  struct {
    unsigned char TMR1IF:1;
    unsigned char TMR2IF:1;
    unsigned char CCP1IF:1;
    unsigned char SSPIF:1;
    unsigned char TXIF:1;
    unsigned char RCIF:1;
    unsigned char ADIF:1;
    unsigned char TMR1GIF:1;
  };
} __PIR1bits_t;
extern volatile __PIR1bits_t __at(PIR1_ADDR) PIR1bits;

// ----- PMCON1 bits --------------------
typedef union {
  struct {
    unsigned char RD:1;
    unsigned char WR:1;
    unsigned char WREN:1;
    unsigned char :1;
    unsigned char FREE:1;
    unsigned char LWLO:1;
    unsigned char CFGS:1;
    unsigned char :1;
  };
} __PMCON1bits_t;
extern volatile __PMCON1bits_t __at(PMCON1_ADDR) PMCON1bits;

// ----- PORTA bits --------------------
typedef union {
  struct {
    unsigned char RA0:1;
    unsigned char RA1:1;
    unsigned char RA2:1;
    unsigned char RA3:1;
    unsigned char RA4:1;
    unsigned char RA5:1;
    unsigned char :1;
    unsigned char :1;
  };
} __PORTAbits_t;
extern volatile __PORTAbits_t __at(PORTA_ADDR) PORTAbits;

// ----- PORTB bits --------------------
typedef union {
  struct {
    unsigned char :1;
    unsigned char :1;
    unsigned char :1;
    unsigned char :1;
    unsigned char RB4:1;
    unsigned char RB5:1;
    unsigned char RB6:1;
    unsigned char RB7:1;
  };
} __PORTBbits_t;
extern volatile __PORTBbits_t __at(PORTB_ADDR) PORTBbits;

// ----- PORTC bits --------------------
typedef union {
  struct {
    unsigned char RC0:1;
    unsigned char RC1:1;
    unsigned char RC2:1;
    unsigned char RC3:1;
    unsigned char RC4:1;
    unsigned char RC5:1;
    unsigned char RC6:1;
    unsigned char RC7:1;
  };
} __PORTCbits_t;
extern volatile __PORTCbits_t __at(PORTC_ADDR) PORTCbits;

// ----- RCSTA bits --------------------
typedef union {
  struct {
    unsigned char RX9D:1;
    unsigned char OERR:1;
    unsigned char FERR:1;
    unsigned char ADDEN:1;
    unsigned char CREN:1;
    unsigned char SREN:1;
    unsigned char RX9:1;
    unsigned char SPEN:1;
  };
} __RCSTAbits_t;
extern volatile __RCSTAbits_t __at(RCSTA_ADDR) RCSTAbits;

// ----- SSPCON bits --------------------
typedef union {
  struct {
    unsigned char SSPM0:1;
    unsigned char SSPM1:1;
    unsigned char SSPM2:1;
    unsigned char SSPM3:1;
    unsigned char CKP:1;
    unsigned char SSPEN:1;
    unsigned char SSPOV:1;
    unsigned char WCOL:1;
  };
} __SSPCONbits_t;
extern volatile __SSPCONbits_t __at(SSPCON_ADDR) SSPCONbits;

// ----- SSPMSK bits --------------------
typedef union {
  struct {
    unsigned char MSK0:1;
    unsigned char MSK1:1;
    unsigned char MSK2:1;
    unsigned char MSK3:1;
    unsigned char MSK4:1;
    unsigned char MSK5:1;
    unsigned char MSK6:1;
    unsigned char MSK7:1;
  };
} __SSPMSKbits_t;
extern volatile __SSPMSKbits_t __at(SSPMSK_ADDR) SSPMSKbits;

// ----- SSPSTAT bits --------------------
typedef union {
  struct {
    unsigned char BF:1;
    unsigned char UA:1;
    unsigned char R_NOT_W:1;
    unsigned char S:1;
    unsigned char P:1;
    unsigned char D_NOT_A:1;
    unsigned char CKE:1;
    unsigned char SMP:1;
  };
} __SSPSTATbits_t;
extern volatile __SSPSTATbits_t __at(SSPSTAT_ADDR) SSPSTATbits;

// ----- STATUS bits --------------------
typedef union {
  struct {
    unsigned char C:1;
    unsigned char DC:1;
    unsigned char Z:1;
    unsigned char NOT_PD:1;
    unsigned char NOT_TO:1;
    unsigned char RP0:1;
    unsigned char RP1:1;
    unsigned char IRP:1;
  };
} __STATUSbits_t;
extern volatile __STATUSbits_t __at(STATUS_ADDR) STATUSbits;

// ----- T1CON bits --------------------
typedef union {
  struct {
    unsigned char TMR1ON:1;
    unsigned char :1;
    unsigned char T1SYNC:1;
    unsigned char :1;
    unsigned char T1CKPS0:1;
    unsigned char T1CKPS1:1;
    unsigned char TMR1CS0:1;
    unsigned char TMR1CS1:1;
  };
  struct {
    unsigned char :1;
    unsigned char :1;
    unsigned char NOT_T1SYNC:1;
    unsigned char :1;
    unsigned char :1;
    unsigned char :1;
    unsigned char :1;
    unsigned char :1;
  };
} __T1CONbits_t;
extern volatile __T1CONbits_t __at(T1CON_ADDR) T1CONbits;

// ----- T1GCON bits --------------------
typedef union {
  struct {
    unsigned char T1GSS0:1;
    unsigned char T1GSS1:1;
    unsigned char T1GVAL:1;
    unsigned char T1GGO_DONE:1;
    unsigned char T1GSPM:1;
    unsigned char T1GTM:1;
    unsigned char T1GPOL:1;
    unsigned char TMR1GE:1;
  };
  struct {
    unsigned char :1;
    unsigned char :1;
    unsigned char :1;
    unsigned char T1GGO_NOT_DONE:1;
    unsigned char :1;
    unsigned char :1;
    unsigned char :1;
    unsigned char :1;
  };
} __T1GCONbits_t;
extern volatile __T1GCONbits_t __at(T1GCON_ADDR) T1GCONbits;

// ----- T2CON bits --------------------
typedef union {
  struct {
    unsigned char T2CKPS0:1;
    unsigned char T2CKPS1:1;
    unsigned char TMR2ON:1;
    unsigned char TOUTPS0:1;
    unsigned char TOUTPS1:1;
    unsigned char TOUTPS2:1;
    unsigned char TOUTPS3:1;
    unsigned char :1;
  };
} __T2CONbits_t;
extern volatile __T2CONbits_t __at(T2CON_ADDR) T2CONbits;

// ----- TRISA bits --------------------
typedef union {
  struct {
    unsigned char TRISA0:1;
    unsigned char TRISA1:1;
    unsigned char TRISA2:1;
    unsigned char :1;
    unsigned char TRISA4:1;
    unsigned char TRISA5:1;
    unsigned char :1;
    unsigned char :1;
  };
} __TRISAbits_t;
extern volatile __TRISAbits_t __at(TRISA_ADDR) TRISAbits;

// ----- TRISB bits --------------------
typedef union {
  struct {
    unsigned char :1;
    unsigned char :1;
    unsigned char :1;
    unsigned char :1;
    unsigned char TRISB4:1;
    unsigned char TRISB5:1;
    unsigned char TRISB6:1;
    unsigned char TRISB7:1;
  };
} __TRISBbits_t;
extern volatile __TRISBbits_t __at(TRISB_ADDR) TRISBbits;

// ----- TRISC bits --------------------
typedef union {
  struct {
    unsigned char TRISC0:1;
    unsigned char TRISC1:1;
    unsigned char TRISC2:1;
    unsigned char TRISC3:1;
    unsigned char TRISC4:1;
    unsigned char TRISC5:1;
    unsigned char TRISC6:1;
    unsigned char TRISC7:1;
  };
} __TRISCbits_t;
extern volatile __TRISCbits_t __at(TRISC_ADDR) TRISCbits;

// ----- TXSTA bits --------------------
typedef union {
  struct {
    unsigned char TX9D:1;
    unsigned char TRMT:1;
    unsigned char BRGH:1;
    unsigned char :1;
    unsigned char SYNC:1;
    unsigned char TXEN:1;
    unsigned char TX9:1;
    unsigned char CSRC:1;
  };
} __TXSTAbits_t;
extern volatile __TXSTAbits_t __at(TXSTA_ADDR) TXSTAbits;

// ----- WPUA bits --------------------
typedef union {
  struct {
    unsigned char WPUA0:1;
    unsigned char WPUA1:1;
    unsigned char WPUA2:1;
    unsigned char WPUA3:1;
    unsigned char WPUA4:1;
    unsigned char WPUA5:1;
    unsigned char :1;
    unsigned char :1;
  };
} __WPUAbits_t;
extern volatile __WPUAbits_t __at(WPUA_ADDR) WPUAbits;

// ----- WPUB bits --------------------
typedef union {
  struct {
    unsigned char :1;
    unsigned char :1;
    unsigned char :1;
    unsigned char :1;
    unsigned char WPUB4:1;
    unsigned char WPUB5:1;
    unsigned char WPUB6:1;
    unsigned char WPUB7:1;
  };
} __WPUBbits_t;
extern volatile __WPUBbits_t __at(WPUB_ADDR) WPUBbits;


#ifndef NO_BIT_DEFINES

#define ADON                 ADCON0bits.ADON                /* bit 0 */
#define GO_NOT_DONE          ADCON0bits.GO_NOT_DONE         /* bit 1 */
#define CHS0                 ADCON0bits.CHS0                /* bit 2 */
#define CHS1                 ADCON0bits.CHS1                /* bit 3 */
#define CHS2                 ADCON0bits.CHS2                /* bit 4 */
#define CHS3                 ADCON0bits.CHS3                /* bit 5 */

#define ADCS0                ADCON1bits.ADCS0               /* bit 4 */
#define ADCS1                ADCON1bits.ADCS1               /* bit 5 */
#define ADCS2                ADCON1bits.ADCS2               /* bit 6 */

#define ANSA0                ANSELAbits.ANSA0               /* bit 0 */
#define ANSA1                ANSELAbits.ANSA1               /* bit 1 */
#define ANSA2                ANSELAbits.ANSA2               /* bit 2 */
#define ANSA4                ANSELAbits.ANSA4               /* bit 4 */
#define ANSA5                ANSELAbits.ANSA5               /* bit 5 */

#define ANSB4                ANSELBbits.ANSB4               /* bit 4 */
#define ANSB5                ANSELBbits.ANSB5               /* bit 5 */

#define ANSC0                ANSELCbits.ANSC0               /* bit 0 */
#define ANSC1                ANSELCbits.ANSC1               /* bit 1 */
#define ANSC2                ANSELCbits.ANSC2               /* bit 2 */
#define ANSC3                ANSELCbits.ANSC3               /* bit 3 */
#define ANSC6                ANSELCbits.ANSC6               /* bit 6 */
#define ANSC7                ANSELCbits.ANSC7               /* bit 7 */

#define CCP1M0               CCP1CONbits.CCP1M0             /* bit 0 */
#define CCP1M1               CCP1CONbits.CCP1M1             /* bit 1 */
#define CCP1M2               CCP1CONbits.CCP1M2             /* bit 2 */
#define CCP1M3               CCP1CONbits.CCP1M3             /* bit 3 */
#define B1                   CCP1CONbits.B1                 /* bit 4 */
#define CCP1Y                CCP1CONbits.CCP1Y              /* bit 4 */
#define CCP1X                CCP1CONbits.CCP1X              /* bit 5 */
#define DC1                  CCP1CONbits.DC1                /* bit 5 */

#define ADFVR0               FVRCONbits.ADFVR0              /* bit 0 */
#define ADFVR1               FVRCONbits.ADFVR1              /* bit 1 */
#define TSRNG                FVRCONbits.TSRNG               /* bit 4 */
#define TSEN                 FVRCONbits.TSEN                /* bit 5 */
#define FVREN                FVRCONbits.FVREN               /* bit 6 */
#define FVRRDY               FVRCONbits.FVRRDY              /* bit 7 */

#define RABIF                INTCONbits.RABIF               /* bit 0 */
#define INTF                 INTCONbits.INTF                /* bit 1 */
#define TMR0IF               INTCONbits.TMR0IF              /* bit 2 */
#define RABIE                INTCONbits.RABIE               /* bit 3 */
#define INTE                 INTCONbits.INTE                /* bit 4 */
#define TMR0IE               INTCONbits.TMR0IE              /* bit 5 */
#define PEIE                 INTCONbits.PEIE                /* bit 6 */
#define GIE                  INTCONbits.GIE                 /* bit 7 */

#define IOCA0                IOCAbits.IOCA0                 /* bit 0 */
#define IOCA1                IOCAbits.IOCA1                 /* bit 1 */
#define IOCA2                IOCAbits.IOCA2                 /* bit 2 */
#define IOCA3                IOCAbits.IOCA3                 /* bit 3 */
#define IOCA4                IOCAbits.IOCA4                 /* bit 4 */
#define IOCA5                IOCAbits.IOCA5                 /* bit 5 */

#define IOCB4                IOCBbits.IOCB4                 /* bit 4 */
#define IOCB5                IOCBbits.IOCB5                 /* bit 5 */
#define IOCB6                IOCBbits.IOCB6                 /* bit 6 */
#define IOCB7                IOCBbits.IOCB7                 /* bit 7 */

#define PS0                  OPTION_REGbits.PS0             /* bit 0 */
#define PS1                  OPTION_REGbits.PS1             /* bit 1 */
#define PS2                  OPTION_REGbits.PS2             /* bit 2 */
#define PSA                  OPTION_REGbits.PSA             /* bit 3 */
#define T0SE                 OPTION_REGbits.T0SE            /* bit 4 */
#define T0CS                 OPTION_REGbits.T0CS            /* bit 5 */
#define INTEDG               OPTION_REGbits.INTEDG          /* bit 6 */
#define NOT_RABPU            OPTION_REGbits.NOT_RABPU       /* bit 7 */

#define ICSS                 OSCCONbits.ICSS                /* bit 2 */
#define ICSL                 OSCCONbits.ICSL                /* bit 3 */
#define IRCF0                OSCCONbits.IRCF0               /* bit 4 */
#define IRCF1                OSCCONbits.IRCF1               /* bit 5 */

#define TUN0                 OSCTUNEbits.TUN0               /* bit 0 */
#define TUN1                 OSCTUNEbits.TUN1               /* bit 1 */
#define TUN2                 OSCTUNEbits.TUN2               /* bit 2 */
#define TUN3                 OSCTUNEbits.TUN3               /* bit 3 */
#define TUN4                 OSCTUNEbits.TUN4               /* bit 4 */
#define TUN5                 OSCTUNEbits.TUN5               /* bit 5 */

#define NOT_BOR              PCONbits.NOT_BOR               /* bit 0 */
#define NOT_POR              PCONbits.NOT_POR               /* bit 1 */

#define TMR1IE               PIE1bits.TMR1IE                /* bit 0 */
#define TMR2IE               PIE1bits.TMR2IE                /* bit 1 */
#define CCP1IE               PIE1bits.CCP1IE                /* bit 2 */
#define SSPIE                PIE1bits.SSPIE                 /* bit 3 */
#define TXIE                 PIE1bits.TXIE                  /* bit 4 */
#define RCIE                 PIE1bits.RCIE                  /* bit 5 */
#define ADIE                 PIE1bits.ADIE                  /* bit 6 */
#define TMR1GIE              PIE1bits.TMR1GIE               /* bit 7 */

#define TMR1IF               PIR1bits.TMR1IF                /* bit 0 */
#define TMR2IF               PIR1bits.TMR2IF                /* bit 1 */
#define CCP1IF               PIR1bits.CCP1IF                /* bit 2 */
#define SSPIF                PIR1bits.SSPIF                 /* bit 3 */
#define TXIF                 PIR1bits.TXIF                  /* bit 4 */
#define RCIF                 PIR1bits.RCIF                  /* bit 5 */
#define ADIF                 PIR1bits.ADIF                  /* bit 6 */
#define TMR1GIF              PIR1bits.TMR1GIF               /* bit 7 */

#define RD                   PMCON1bits.RD                  /* bit 0 */
#define WR                   PMCON1bits.WR                  /* bit 1 */
#define WREN                 PMCON1bits.WREN                /* bit 2 */
#define FREE                 PMCON1bits.FREE                /* bit 4 */
#define LWLO                 PMCON1bits.LWLO                /* bit 5 */
#define CFGS                 PMCON1bits.CFGS                /* bit 6 */

#define RA0                  PORTAbits.RA0                  /* bit 0 */
#define RA1                  PORTAbits.RA1                  /* bit 1 */
#define RA2                  PORTAbits.RA2                  /* bit 2 */
#define RA3                  PORTAbits.RA3                  /* bit 3 */
#define RA4                  PORTAbits.RA4                  /* bit 4 */
#define RA5                  PORTAbits.RA5                  /* bit 5 */

#define RB4                  PORTBbits.RB4                  /* bit 4 */
#define RB5                  PORTBbits.RB5                  /* bit 5 */
#define RB6                  PORTBbits.RB6                  /* bit 6 */
#define RB7                  PORTBbits.RB7                  /* bit 7 */

#define RC0                  PORTCbits.RC0                  /* bit 0 */
#define RC1                  PORTCbits.RC1                  /* bit 1 */
#define RC2                  PORTCbits.RC2                  /* bit 2 */
#define RC3                  PORTCbits.RC3                  /* bit 3 */
#define RC4                  PORTCbits.RC4                  /* bit 4 */
#define RC5                  PORTCbits.RC5                  /* bit 5 */
#define RC6                  PORTCbits.RC6                  /* bit 6 */
#define RC7                  PORTCbits.RC7                  /* bit 7 */

#define RX9D                 RCSTAbits.RX9D                 /* bit 0 */
#define OERR                 RCSTAbits.OERR                 /* bit 1 */
#define FERR                 RCSTAbits.FERR                 /* bit 2 */
#define ADDEN                RCSTAbits.ADDEN                /* bit 3 */
#define CREN                 RCSTAbits.CREN                 /* bit 4 */
#define SREN                 RCSTAbits.SREN                 /* bit 5 */
#define RX9                  RCSTAbits.RX9                  /* bit 6 */
#define SPEN                 RCSTAbits.SPEN                 /* bit 7 */

#define SSPM0                SSPCONbits.SSPM0               /* bit 0 */
#define SSPM1                SSPCONbits.SSPM1               /* bit 1 */
#define SSPM2                SSPCONbits.SSPM2               /* bit 2 */
#define SSPM3                SSPCONbits.SSPM3               /* bit 3 */
#define CKP                  SSPCONbits.CKP                 /* bit 4 */
#define SSPEN                SSPCONbits.SSPEN               /* bit 5 */
#define SSPOV                SSPCONbits.SSPOV               /* bit 6 */
#define WCOL                 SSPCONbits.WCOL                /* bit 7 */

#define MSK0                 SSPMSKbits.MSK0                /* bit 0 */
#define MSK1                 SSPMSKbits.MSK1                /* bit 1 */
#define MSK2                 SSPMSKbits.MSK2                /* bit 2 */
#define MSK3                 SSPMSKbits.MSK3                /* bit 3 */
#define MSK4                 SSPMSKbits.MSK4                /* bit 4 */
#define MSK5                 SSPMSKbits.MSK5                /* bit 5 */
#define MSK6                 SSPMSKbits.MSK6                /* bit 6 */
#define MSK7                 SSPMSKbits.MSK7                /* bit 7 */

#define BF                   SSPSTATbits.BF                 /* bit 0 */
#define UA                   SSPSTATbits.UA                 /* bit 1 */
#define R_NOT_W              SSPSTATbits.R_NOT_W            /* bit 2 */
#define S                    SSPSTATbits.S                  /* bit 3 */
#define P                    SSPSTATbits.P                  /* bit 4 */
#define D_NOT_A              SSPSTATbits.D_NOT_A            /* bit 5 */
#define CKE                  SSPSTATbits.CKE                /* bit 6 */
#define SMP                  SSPSTATbits.SMP                /* bit 7 */

#define C                    STATUSbits.C                   /* bit 0 */
#define DC                   STATUSbits.DC                  /* bit 1 */
#define Z                    STATUSbits.Z                   /* bit 2 */
#define NOT_PD               STATUSbits.NOT_PD              /* bit 3 */
#define NOT_TO               STATUSbits.NOT_TO              /* bit 4 */
#define RP0                  STATUSbits.RP0                 /* bit 5 */
#define RP1                  STATUSbits.RP1                 /* bit 6 */
#define IRP                  STATUSbits.IRP                 /* bit 7 */

#define TMR1ON               T1CONbits.TMR1ON               /* bit 0 */
#define NOT_T1SYNC           T1CONbits.NOT_T1SYNC           /* bit 2 */
#define T1SYNC               T1CONbits.T1SYNC               /* bit 2 */
#define T1CKPS0              T1CONbits.T1CKPS0              /* bit 4 */
#define T1CKPS1              T1CONbits.T1CKPS1              /* bit 5 */
#define TMR1CS0              T1CONbits.TMR1CS0              /* bit 6 */
#define TMR1CS1              T1CONbits.TMR1CS1              /* bit 7 */

#define T1GSS0               T1GCONbits.T1GSS0              /* bit 0 */
#define T1GSS1               T1GCONbits.T1GSS1              /* bit 1 */
#define T1GVAL               T1GCONbits.T1GVAL              /* bit 2 */
#define T1GGO_DONE           T1GCONbits.T1GGO_DONE          /* bit 3 */
#define T1GGO_NOT_DONE       T1GCONbits.T1GGO_NOT_DONE      /* bit 3 */
#define T1GSPM               T1GCONbits.T1GSPM              /* bit 4 */
#define T1GTM                T1GCONbits.T1GTM               /* bit 5 */
#define T1GPOL               T1GCONbits.T1GPOL              /* bit 6 */
#define TMR1GE               T1GCONbits.TMR1GE              /* bit 7 */

#define T2CKPS0              T2CONbits.T2CKPS0              /* bit 0 */
#define T2CKPS1              T2CONbits.T2CKPS1              /* bit 1 */
#define TMR2ON               T2CONbits.TMR2ON               /* bit 2 */
#define TOUTPS0              T2CONbits.TOUTPS0              /* bit 3 */
#define TOUTPS1              T2CONbits.TOUTPS1              /* bit 4 */
#define TOUTPS2              T2CONbits.TOUTPS2              /* bit 5 */
#define TOUTPS3              T2CONbits.TOUTPS3              /* bit 6 */

#define TRISA0               TRISAbits.TRISA0               /* bit 0 */
#define TRISA1               TRISAbits.TRISA1               /* bit 1 */
#define TRISA2               TRISAbits.TRISA2               /* bit 2 */
#define TRISA4               TRISAbits.TRISA4               /* bit 4 */
#define TRISA5               TRISAbits.TRISA5               /* bit 5 */

#define TRISB4               TRISBbits.TRISB4               /* bit 4 */
#define TRISB5               TRISBbits.TRISB5               /* bit 5 */
#define TRISB6               TRISBbits.TRISB6               /* bit 6 */
#define TRISB7               TRISBbits.TRISB7               /* bit 7 */

#define TRISC0               TRISCbits.TRISC0               /* bit 0 */
#define TRISC1               TRISCbits.TRISC1               /* bit 1 */
#define TRISC2               TRISCbits.TRISC2               /* bit 2 */
#define TRISC3               TRISCbits.TRISC3               /* bit 3 */
#define TRISC4               TRISCbits.TRISC4               /* bit 4 */
#define TRISC5               TRISCbits.TRISC5               /* bit 5 */
#define TRISC6               TRISCbits.TRISC6               /* bit 6 */
#define TRISC7               TRISCbits.TRISC7               /* bit 7 */

#define TX9D                 TXSTAbits.TX9D                 /* bit 0 */
#define TRMT                 TXSTAbits.TRMT                 /* bit 1 */
#define BRGH                 TXSTAbits.BRGH                 /* bit 2 */
#define SYNC                 TXSTAbits.SYNC                 /* bit 4 */
#define TXEN                 TXSTAbits.TXEN                 /* bit 5 */
#define TX9                  TXSTAbits.TX9                  /* bit 6 */
#define CSRC                 TXSTAbits.CSRC                 /* bit 7 */

#define WPUA0                WPUAbits.WPUA0                 /* bit 0 */
#define WPUA1                WPUAbits.WPUA1                 /* bit 1 */
#define WPUA2                WPUAbits.WPUA2                 /* bit 2 */
#define WPUA3                WPUAbits.WPUA3                 /* bit 3 */
#define WPUA4                WPUAbits.WPUA4                 /* bit 4 */
#define WPUA5                WPUAbits.WPUA5                 /* bit 5 */

#define WPUB4                WPUBbits.WPUB4                 /* bit 4 */
#define WPUB5                WPUBbits.WPUB5                 /* bit 5 */
#define WPUB6                WPUBbits.WPUB6                 /* bit 6 */
#define WPUB7                WPUBbits.WPUB7                 /* bit 7 */
#endif /* NO_BIT_DEFINES */

#endif
